Microelectronic systems commonly contain power devices prone to the generation of excess heat during operation, particularly when such devices operate at higher power levels and, when applicable, at higher RF frequencies. In the absence of an adequate means for removing excess heat from the system, undesirably elevated temperatures or “hot spots” can occur at localized regions within the microelectronic system and the power device or devices contained therein. Such elevated localized temperatures can detract from device performance and degrade the reliability of the microelectronic system by accelerating common failure modes, such as solder joint fatigue. For this reason, microelectronic systems containing power devices are commonly fabricated utilizing embedded coined substrates; that is, substrates incorporating metal slugs or “coins” as dedicated mount structures having relatively high thermal conductivities. By attaching a power device or a module containing power device(s) to an embedded coin, excess heat concentrations may be more effectively dissipated to enhance the thermal performance of the microelectronic system.
While generally having improved heat dissipation capabilities, microelectronic systems fabricated utilizing embedded coin substrates remain limited in certain regards. The manufacturing processes utilized to fabricate coined substrates are often relatively complex, costly, and may involve exposure to elevated processing temperatures at which substrate warpage and other deleterious effects can occur. Manufacturing cost and complexity further increase when utilizing an embedded coin for electrical interconnection purposes; e.g., to electrically couple a ground pad of a power device or device-containing microelectronic component to a ground layer contained within the substrate. To provide a specific example, certain multilayer PCBs are now fabricate to include embedded coins and ring-shaped clusters of vias commonly referred to as “via farms,” which extend through the upper PCB layers to connect the embedded coins to electrical ground within the PCB. Fabricating an embedded coin substrate in this manner can reduce PCB manufacturing costs, while providing a reliable connection between the embedded coin and a ground layer within the PCB; however, embedded coin PCBs of this type remain undesirably costly to produce and do little to enhance the overall heat dissipation capabilities of the microelectronic system.
Setting aside the manufacturing-related limitations above, microelectronic systems fabricated utilizing embedded coin substrates remain limited in other respects, as well. As conventionally designed and fabricated, such systems typically rely solely or exclusively upon legacy materials, such as solder materials, to attach heat-generating microelectronic components to the upper surfaces of coins embedded within a particular PCB or substrate. While acceptable in many, if not most applications, the thermal conductivities and temperature tolerances of such materials can be undesirably restrictive in the context of high power and high frequency applications, such as certain RF applications. Consequently, the integration of conventional embedded coined substrates into microelectronic systems containing power devices again provides a suboptimal heat dissipation solution. Highly elevated local temperatures may still occur at certain junctures within the thermal stack (that is, the various layers of materials through which conductive heat flow is desired) in a manner exacerbating failure modes of the microelectronic system when operated at higher power levels and/or at higher operational frequencies.
For simplicity and clarity of illustration, descriptions and details of well-known features and techniques may be omitted to avoid unnecessarily obscuring the exemplary and non-limiting embodiments of the invention described in the subsequent Detailed Description. It should further be understood that features or elements appearing in the accompanying figures are not necessarily drawn to scale unless otherwise stated. For example, the dimensions of certain elements or regions in the figures may be exaggerated relative to other elements or regions to improve understanding of embodiments of the invention.